Đăng nhập
 
Tìm kiếm nâng cao
 
Tên bài báo
Tác giả
Năm xuất bản
Tóm tắt
Lĩnh vực
Phân loại
Số tạp chí
 

Bản tin định kỳ
Báo cáo thường niên
Tạp chí khoa học ĐHCT
Tạp chí tiếng anh ĐHCT
Tạp chí trong nước
Tạp chí quốc tế
Kỷ yếu HN trong nước
Kỷ yếu HN quốc tế
Book chapter
Bài báo - Tạp chí
(2020) Trang: 54–57
Tạp chí: The 3nd International Conference on Electronics, Communications and Control Engineering,Bali, Indonesia, April 8-10, 2020

Herein, we propose a fast yield estimation approach for analog circuits design in which we combine the behavioral model of circuit and the Quasi-Monte Carlo (QMC) sampling technique to accelerate yield estimation process. The behavioral model is constructed in Verilog-A based on the simulation results which are done at transistor-level; then, the accuracy of the model is verified by experimental testing on a specific analog circuit. Furthermore, instead of using random circuit samples, in this work, QMC circuit samples are adopted to obtain faster convergence rates for the yield prediction process. In conventional analog design stage, designers repeat a number of yield estimation process to select the optimal design point. Each yield estimation effort is a time-consuming process since designers have to simulate on a large number of circuits. Unlike the conventional method, in this work, we build a look-up table for constructing behavioral model of any given circuit; then, this table can be reused in repeating the yield-estimation processes. Therefore, the proposed method can significantly reduce the time for the yield estimation process. Experimental results show that the proposed approach can speed-up the yield estimation process 8 times compared to conventional simulation-based methods with a reasonable drop in accuracy (less than 5%).

Các bài báo khác
Số 25 (2013) Trang: 1-7
Tác giả: Nguyễn Cao Quí
Tải về
(2019) Trang: 54-57
Tạp chí: The 2019 2nd International Conference on Electronics, Communications and Control Engineering Phuket, Thailand — April 13 - 16, 2019
11 (2017) Trang: 2370-2378
Tạp chí: IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
58 (2017) Trang: 64-73
Tạp chí: Integration, the VLSI Journal, Elsevier
 


Vietnamese | English






 
 
Vui lòng chờ...